mpc5645s单片机数据手册

　　The Q orivva MPC5645S represents a new genera tion of 32-bit m icrocontrolle rs targeting single-chip automotive instrument clus ter applications. MPC5645S devices are part of the MPC56xxS family of Power Architecture®-based devices. This family has been designed with an emphasis on providing cost-effective and high quality graphics capabilities in order to satisfy the increasing market demand for color Thin Film Transistor （ TFT） displays within the vehicle cock pit. Tr aditional cluster functions， such as gauge drive， real time counter， and sound generation are also integrated on e ach device. Devices in the MPC56xxS family cont ain between 256 KB and 2 MB internal flash memory. The family allows for easy expansion and covers a bro ad range of cluster applications from low to high-end enabling users to design a complete platform around one common architecture. Serial flash memory and DRAM interfaces are provided to allow even greater system flexibility. The MPC5645S is designed to reduce development and production costs of TFT-based instrument cluster displays by providing a single-chip solution with the processing and storage capacity to host and execute real-time application software and drive TFT displays directly. The MPC5645S features a 2D OpenVG graphics accelerator， Video Input Unit （VIU2） and two on-chip display control units （ DCU3 and DCULite） designed to drive two color TFT displays simultaneously. The MPC5645S includes an enhanced Qua dSPI Serial Flash Controller and an optional D RAM controller allowing graphics RAM expansion externally. The MPC5645S is compatible with the existing development infrastructure of current Power Architecture devices and are supported with software drivers， operating systems and configuration code to assist with application development.